Adaptive Clock Recovery (ACR) is a timing-over-packet technology that transports timing information via periodic packet delivery over a pseudowire. ACR may be used when there is no other Stratum 1 traceable clock available.
ACR is supported on T1/E1 CES circuits on the following:
16-port T1/E1 ASAP Adapter card
32-port T1/E1 ASAP Adapter card
7705 SAR-M (variants with T1/E1 ports)
7705 SAR-A (variant with T1/E1 ports)
T1/E1 ports of the 4-port T1/E1 and RS-232 Combination module
T1/E1 ports on the 7705 SAR-X
ACR is not supported on DS1 or E1 channels that have CAS signaling enabled.
ACR is supported for Cpipe services. In addition, ACR is supported on MEF 8 Epipe services. The MEF 8 Epipe may be a TDM SAP to Ethernet SAP or a TDM SAP to spoke SDP. Refer to the 7705 SAR Services Guide, ‟MEF 8”, for information on MEF 8.
There is no extra equipment cost to implement ACR in a network because this technique uses the packet arrival rate of a TDM pseudowire within the 7705 SAR to regenerate a clock signal. Additionally, the nodes in the network that are traversed between endpoints do not need special ACR capabilities. However, because the TDM pseudowire is transported over Layer 2 links, the packet flow is susceptible to PDV.
To achieve the best ACR performance, follow these recommendations:
use a packet rate between 1000 pps and 4000 pps. Lower packet rates cause ACR to be more susceptible to PDV in the network.
limit the number of nodes traversed between the source-end and the ACR-end of the TDM pseudowire
enable QoS in the network with the TDM pseudowire enabled for ACR classified as NC (network control)
maintain a constant temperature, as much as possible, because temperature variations will affect the natural frequency on the internal oscillators in the 7705 SAR
ensure that the network does not contain a timing loop when it is designed