The following are general guidelines for MAC chip selection and the loopback naming:
A suitable card candidate has lower actual traffic volumes through faceplate ports so the unused bandwidth in the forwarding complex can be used for PXC.
A suitable MAC chip candidate is connected to the faceplate ports with lower bandwidth utilization.
SR-s platforms with IOM-s cards (XIOM configuration), a loopback ID influences the selection of the fabric tap to which the PXC traffic is mapped. In these platforms, loopback should be distributed over the fabric taps in a way that avoids congestion. This is described in Internal PXC and source fabric taps
The connectivity layout between the MAC chips, faceplate ports, and fabric taps is shown in the output of the following command:
A:admin@cses-B04# /show datapath 1 detail
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Card [XIOM/]MDA FP TAP MAC Chip Num Connector Port
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1 x1/1 1 1 1 c1 1/x1/1/c1/1
1 x1/1 1 1 1 c1 1/x1/1/c1/2
1 x1/1 1 1 1 c2 1/x1/1/c2/1
1 x1/1 1 1 1 c2 1/x1/1/c2/2
1 x1/1 1 1 1 c3 1/x1/1/c3/1
1 x1/1 1 1 1 c3 1/x1/1/c3/2
1 x1/1 1 N/A 2 c4
1 x1/1 1 N/A 2 c5
1 x1/1 1 N/A 2 c6
1 x1/1 1 1 1 N/A 1/x1/1/m1/1
1 x1/2 2 1 1 c1 1/x1/2/c1/1
1 x1/2 2 1 1 c1 1/x1/2/c1/2
1 x1/2 2 1 1 c1 1/x1/2/c1/3
1 x1/2 2 1 1 c1 1/x1/2/c1/4
1 x1/2 2 1 1 c1 1/x1/2/c1/5
1 x1/2 2 1 1 c1 1/x1/2/c1/6
1 x1/2 2 1 1 c1 1/x1/2/c1/7
1 x1/2 2 1 1 c1 1/x1/2/c1/8
1 x1/2 2 1 1 c1 1/x1/2/c1/9
1 x1/2 2 1 1 c1 1/x1/2/c1/10
1 x1/2 2 N/A 1 c2
1 x1/2 2 N/A 1 c3
1 x1/2 2 N/A 1 c4
1 x1/2 2 N/A 1 c5
1 x1/2 2 N/A 1 c6
1 x1/2 2 N/A 2 c7
1 x1/2 2 N/A 2 c8
1 x1/2 2 N/A 2 c9
1 x1/2 2 2 2 c10 1/x1/2/c10/1
1 x1/2 2 2 2 c10 1/x1/2/c10/2
1 x1/2 2 2 2 c10 1/x1/2/c10/3
1 x1/2 2 2 2 c10 1/x1/2/c10/4
1 x1/2 2 2 2 c10 1/x1/2/c10/5
1 x1/2 2 2 2 c10 1/x1/2/c10/6
1 x1/2 2 2 2 c10 1/x1/2/c10/7
1 x1/2 2 2 2 c10 1/x1/2/c10/8
1 x1/2 2 2 2 c10 1/x1/2/c10/9
1 x1/2 2 2 2 c10 1/x1/2/c10/10
1 x1/2 2 N/A 2 c11
1 x1/2 2 N/A 2 c12
1 x1/2 2 N/A 3 c13
1 x1/2 2 N/A 3 c14
1 x1/2 2 N/A 3 c15
1 x1/2 2 N/A 3 c16
1 x1/2 2 N/A 3 c17
1 x1/2 2 N/A 3 c18