Central synchronization subsystem

The timing subsystem has a central clock located on the CPM. The timing subsystem performs several functions of the network element clock as defined by Telcordia (GR-1244-CORE) and ITU-T G.781 standards.

The central clock uses the available timing inputs to train its local oscillator. The number of timing inputs available to train the local oscillator varies per platform. The priority order of these references must be specified. This is an ordered list of inputs: (ref1, ref2). The CPM clock output can drive the clocking for all line cards in the system. The routers support selection of the node reference using Quality Level (QL) indications. The recovered clock will be able to derive its timing from one of the references available on that platform.

Figure: A logical model of the synchronization reference selection on 7210 SAS platforms shows how on 7210 SAS devices, the recovered clock is able to derive the timing from any of the following references:

• synchronous Ethernet ports

• 1588v2/PTP timeReceiver port

See Synchronization options available on 7210 SAS platforms for information about the synchronization options supported by each 7210 SAS platform.

The following figure shows the synchronization reference selection available for the 7210 SAS platforms.

Figure: A logical model of the synchronization reference selection on 7210 SAS platforms

When Quality Level (QL) selection mode is disabled, the reversion setting controls when the central clock can reselect a previously failed reference.

The following table describes the selection followed for two references in both revertive and non-revertive modes.