PTP Ordinary Slave Clock for Time of Day/Phase Recovery

The following equipment supports PTP slave clock for time of day/phase recovery:

• all fixed platforms listed in Table: IEEE 1588v2 PTP Support per Fixed Platform

• all cards listed in Table: IEEE 1588v2 PTP Support per Card on the 7705 SAR-8 Shelf V2 and 7705 SAR-18

The 7705 SAR can receive and extract time of day/phase recovery from a 1588 grand master clock or boundary clock and transmit the recovered time of day/phase signal to an external device such as a base station through an external time of day port, where available. The PTP slave clock can be used as a reference for the router system time clock, providing high-accuracy OAM timestamping and measurements for the 7705 SAR chassis.

On the 7705 SAR-8 Shelf V2 CSMv2, 7705 SAR-A, 7705 SAR-Ax, 7705 SAR-M, and 7705 SAR-X, transmission is through the ToD port with a 1 pulse/s output signal that is phase-aligned with other routers that are similarly time of day/phase synchronized. An RS-422 serial interface within the ToD port connector communicates the exact time of day of the rising edge of the 1 pulse/s signal. The serial interface on the ToD out port and the ToD in port on the CSMv2 are currently not supported; therefore, the 7705 SAR-8 Shelf V2 does not support Time of Day messages.

On the 7705 SAR-H, transmission is through the IRIG-B Out port. An RJ-45 interface is used for the IRIG-B Out port to communicate the exact time of day by the rising edge of the 1 pulse/s signal, an IRIG-B000 unmodulated time code signal, and an IRIG-B12X modulated time code signal.

On the 7705 SAR-H, the Time of Day message output is only available when the router is configured with an active IP PTP slave clock or boundary clock. For all other routers, the Time of Day message output is available when the router is configured with an active IP PTP slave clock or boundary clock or when Time of Day is recovered from an Ethernet PTP clock or integrated GNSS.

Table: 1pps/ToD Message Support lists the 1 pulse/s signal (1pps) support and Time of Day messaging support per platform.

Table: ToD Messages describes the format of the ToD message.

For incoming IEEE 1588 packets, the destination IP address is the 7705 SAR-M, 7705 SAR-H, 7705 SAR-Hc, 7705 SAR-A, 7705 SAR-Ax, 7705 SAR-Wx, or 7705 SAR-X loopback address. The ingress interface can be an SFP Ethernet port on the faceplate of the chassis, an RJ-45 port on the faceplate of the chassis, or a port on an installed module.

Each PTP slave clock can be configured to receive timing from up to two PTP master clocks in the network. If both master clocks are available, the slave clock uses default BMCA to determine which of the two master clocks it should synchronize.

PTP messaging between the PTP master clock and PTP slave clock is done over UDP/IP using IPv4 unicast mode with a fixed IP header size or using IPv6. Unicast negotiation is supported. Each PTP instance supports up to 128 synchronization messages per second.

PTP recovered time accuracy depends on the delay of the forward path and the reverse path being symmetrical. It is possible to correct for known path delay asymmetry by using the ptp-asymmetry command for PTP packets destined for the local slave clock or downstream PTP slave clock.