When configuring channelized ports, the port ID is specified in different ways depending on the MDA type and level of channelization. Ethernet ports cannot be channelized. Table 1 lists the channelization options and port syntax available on the 7750 SR channelized MDAs.
| Framing | Channelization/mapping option | Channelized MDAs supporting services on the port/channel |
|---|---|---|
599,040 kb/s (clear channel OC12/STM-4) |
||
SDH |
STM4>AUG4>VC4-C4 |
None |
SONET |
OC12>STS12>STS12c SPE |
None |
139,264 kb/s ñ 149,760 kb/s (clear channel STS-3/STM-1 or STS-3/STM-1 channel within STS12-STM4 |
||
SDH |
STM4>AUG4>AUG1>VC4 |
m4-choc3-as |
SONET |
OC12>STS12>STS3c SPE |
m4-choc3-as |
44,763 kb/s (DS3 or sub-DS3 port or a channel) |
||
SDH |
STM4>AUG4>AUG1>VC4>TUG3>VC3 |
m1-choc12 m4-choc3 m12-chds3 m4-choc3-as |
SDH |
STM4>AUG4>AUG1>VC3 |
m1-choc12 m4-choc3 m12-chds3 m4-choc3-as |
SONET |
OC12>STS12>STS1 SPE |
m1-choc12 m4-choc3 m12-chds3 m4-choc3-as |
SDH |
STM4>AUG4>AUG1>VC4>TUG3>VC3 |
m1-choc12 m4-choc3 m12-chds3 m4-choc3-as |
SDH |
STM4>AUG4>AUG1>VC3 |
m1-choc12 m4-choc3 m12-chds3 m4-choc3-as |
SONET |
OC12>STS12>STS1 SPE |
m1-choc12 m4-choc3 m12-chds3 m4-choc3-as |
Up to 2,048 kb/s (n*DS0 within E1 up to E1) |
||
SDH |
STM4>AUG4>AUG1>VC4>TUG3>TUG2>VC12 |
m1-choc12 m4-choc3 m12-chds3 m4-choc3-as |
SDH |
STM4>AUG4>AUG1>VC3>TUG2>VC12 |
m1-choc12 m4-choc3 m12-chds3 m4-choc3-as |
SDH |
STM4>AUG4>AUG1>VC4>TUG3>VC3>DS3 |
m1-choc12 m4-choc3 m12-chds3 m4-choc3-as |
SDH |
STM4>AUG4>AUG1>VC3>DS3 |
m1-choc12 m4-choc3 m12-chds3 m4-choc3-as |
SONET |
OC12>STS12>STS1 SPE>VT GROUP>VT2 SPE |
m1-choc12 m4-choc3 m12-chds3 m4-choc3-as |
SONET |
OC12>STS12>STS1 SPE>DS3 |
m1-choc12 m4-choc3 m12-chds3 m4-choc3-as |
Up to 1,544 kb/s (n*DS0 within DS1 up to DS1) |
||
SDH |
STM4>AUG4>AUG1>VC4>TUG3>TUG2>TU11>VC11 |
m1-choc12 m4-choc3 m12-chds3 m4-choc3-as |
SDH |
STM4>AUG4>AUG1>VC4>TUG3>TUG2>TU12>VC11 |
None |
SDH |
STM4>AUG4>AUG1>VC3>TUG2>VC11 |
m1-choc12 m4-choc3 m12-chds3 m4-choc3-as |
SDH |
STM4>AUG4>AUG1>VC4>TUG3>TUG2>VC12 |
m1-choc12 m4-choc3 m12-chds3 |
SDH |
STM4>AUG4>AUG1>VC3>TUG2>VC12 |
m1-choc12 m4-choc3 m12-chds3 m4-choc3-as |
SDH |
STM4>AUG4>AUG1>VC4>TUG3>VC3>DS3 |
m1-choc12 m4-choc3 m12-chds3 m4-choc3-as |
SDH |
STM4>AUG4>AUG1>VC3>DS3 |
m1-choc12 m4-choc3 m12-chds3 m4-choc3-as |
SONET |
OC12>STS12>STS1 SPE>VT GROUP>VT1.5 SPE |
m1-choc12 m4-choc3 m12-chds3 m4-choc3-as |
SONET |
OC12>STS12>STS1 SPE>VT GROUP>VT2 SPE |
m1-choc12 m4-choc3 m12-chds3 |
SONET |
OC12>STS12>STS1 SPE>DS3 |
m1-choc12 m4-choc3 m12-chds3 m4-choc3-as |
The E1 encapsulation in the ASAP MDA and in the channelized MDAs is compliant to G.704 and G.703. The G.703 feature allows a user to configure an unstructured E1 channel on deep channel MDAs and ASAP MDAs. In G.704, time slot 0 carries timing information by a service provider and therefore, only 31 slots are available to the end user. In G.703, all 32 time slots are available to the end user. Timing is provided by the end user.
A port ID for channels has one of the following syntax as applicable to channelization and mapping options where the port configuration syntax is slot/mda/port (Table 2).
| Port ID for physical port speed | |||
|---|---|---|---|
| Channel speed | OC12/STM4 | OC3/STM1 | DS3/E3 |
SONET/SDH |
|||
STS12/STM4 |
port.sts12 |
— |
— |
STS3/STM1 |
port.sts3-{1 to 4} |
port.sts3 |
— |
STS1/STM0 |
port.sts1-{1 to 4}.{1 to 3} |
port.sts1-{1 to 3} |
— |
TUG3 |
port.tug3-{1 to 4}.{1 to 3} |
port.tug3-{1 to 3} |
— |
TU3 |
port.tu3-{1 to 4}.{1 to 3} |
port.tu3-{1 to 3} |
— |
| VT15/VC1.11 | port.vt15-{1 to 4}.{1 to 3}.{1 to 4}.{1 to 7} |
port.vt15-{1 to 3}.{1 to 4}.{1 to 7} |
— |
| VT2/VC12 1 | port.vt2-{1 to 4}.{1 to 3}.{1 to 3}.{1 to 7} |
port.vt2-{1 to 3}.{1 to 3}.{1 to 7} |
— |
TDM |
|||
DS3/E3 |
port.{1 to 4}.{1 to 3} |
port.{1 to 3} |
port |
DS1 in DS3 |
port.{1 to 4}.{1 to 3}.{1 to 28} |
port.{1 to 3}.{1 to 28} |
port.{1 to 28} |
DS1 in VT2 |
port.{1 to 4}.{1 to 3}.{1 to 3}.{1 to 7} |
port.{1 to 3}.{1 to 3}.{1 to 7} |
— |
DS1 in VT15 |
port.{1 to 4}.{1 to 3}.{1 to 4}.{1 to 7} |
port.{1 to 3}.{1 to 4}.{1 to 7} |
— |
E1 in DS3 |
port.{1 to 4}.{1 to 3}.{1 to 21} |
port.{1 to 3}.{1 to 21} |
port.{1 to 21} |
E1 in VT2 |
port.{1 to 4}.{1 to 3}.{1 to 3}.{1 to 7} |
port.{1 to 3}.{1 to 3}.{1 to 7} |
— |
N*DS0 in DS1 in DS3 |
port.{1 to 4}.{1 to 3}.{1 to 28}.{1 to 24} |
port.{1 to 3}.{1 to 28}.{1 to 24} |
port.{1 to 28}.{1 to 24} |
N*DS0 in DS1 in VT2 |
port.{1 to 4}.{1 to 3}.{1 to 3}.{1 to 7}.{1 to 24} |
port.{1 to 3}.{1 to 3}.{1 to 7}.{1 to 24} |
— |
N*DS0 in DS1 in VT15 |
port.{1 to 4}.{1 to 3}.{1 to 4}.{1 to 7}.{1 to 24} |
port.{1 to 3}.{1 to 4}.{1 to 7}.{1 to 24} |
— |
N*DS0 in E1in DS3 |
port.{1 to 4}.{1 to 3}.{1 to 21}.{2 to 32} |
port.{1 to 3}.{1 to 21}.{2 to 32} |
port.{1 to 21}.{2 to 32} |
N*DS0 in E1in VT2 |
port.{1 to 4}.{1 to 3}.{1 to 3}.{1 to 7}.{2 to 32} |
port.{1 to 3}.{1 to 3}.{1 to 7}.{2 to 32} |
— |